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| AT27C800 Features * * * * * Read Access Time - 100 ns Word-wide or Byte-wide Configurable 8-Megabit Flash and Mask ROM Compatable Low Power CMOS Operation - 100 A Maximum Standby - 50 mA Maximum Active at 5 MHz Wide Selection of JEDEC Standard Packages - 42-Lead 600 mil Cerdip and PDIP - 44-Lead SOIC (SOP) - 48-Lead TSOP (12 mm x 20 mm) 5V 10% Power Supply High Reliability CMOS Technology - 2,000 ESD Protection - 200 mA Latchup Immunity RapidTM Programming Algorithm - 50 s/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges * * * * * * Description The AT27C800 is a low-power, high performance 8,388,608-bit UV erasable programmable read only memory (EPROM) organized as either 512K by 16 or 1024K by 8 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 100 ns, eliminating the need for speed-reducing WAIT states. The x16 organization makes this part ideal for high-performance 16- and 32-bit (continued) microprocessor systems. 8-Megabit (512K x 16 or 1024K x 8) UV Erasable EPROM AT27C800 Preliminary Pin Configurations Pin Name A0 - A18 O0 - O15 O15/A-1 BYTE/VPP CE OE NC Function Addresses Outputs Output/Address Byte Mode/ Program Supply Chip Enable Output Enable No Connect CDIP, PDIP Top View A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE O0 O8 O1 O9 O2 O10 O3 O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC SOIC (SOP) NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE O0 O8 O1 O9 O2 O10 O3 O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC TSOP Type 1 A15 A14 A13 A12 A11 A10 A9 A8 NC NC NC NC NC NC NC A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE/VPP GND O15/A-1 O7 O14 O6 O13 O5 O12 O4 VCC O11 O3 O10 O2 O9 O1 O8 O0 OE GND CE A0 0801A-A 1 The AT27C800 can be organized as either word-wide or byte-wide. The organization is selected via the BYTE/VPP pin. When BYTE/VPP is asserted high (VIH), the word-wide organization is selected and the O15/A-1 pin is used for O15 data output. When BYTE/VPP is asserted low (VIL),the byte wide organization is selected and the O15/A-1 pin is used for the address pin A-1. When the AT27C800 is logically regarded as x16 (word-wide), but read in the bytewide mode, then with A-1=VIL the lower eight bits of the 16 bit word are selected with A-1 =VIH the upper 8 bits of the 16-bit word are selected. In read mode, the AT27C800 typically consumes 15 mA. Standby mode supply current is typically less than 10 A. The AT27C800 is available in industry standard JEDECapproved one-time programmable (OTP)PDIP, SOIC (SOP), and TSOP as well as UV erasable windowed Cerdip packages. The device features two-line control(CE,OE) to eliminate bus contention in high-speed systems. With high density 512K word or 1024K-bit storage capability, the AT27C800 allows firmware to be to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel's AT27C800 has additional features that ensure high quality and efficient production use. The RapidTM Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50s/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming equipment and voltages. Erasure Characteristics The entire memory array of the AT27C800 is erased (all outputs read as VOH) after exposure to ultraviolet light at a wavelength of 2,537A. Complete erasure is assured after a minimum of 20 minutes of exposure using 12,000 W/cm2 intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be calculated from the minimum integrated erasure dose of 15 W.sec/cm2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable EPROM that will be subjected to continuous flourescent indoor lighting or sunlight. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 F high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 F bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Block Diagram 2 AT27C800 AT27C800 Absolute Maximum Ratings* Temperature Under Bias ...................-55C to +125C Storage Temperature ........................-65C to +150C Voltage on Any Pin with with Respect to Ground.....................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground .........................-2.0V to +14.0V(1) VPP Supply Voltage with Respect to Ground ..........................-2.0V to +14.0V(1) Integrated UV Erase Dose............... 7258 W *sec/cm2 Note: 1. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is Vcc + 0.75V DC which may overshoot to + 7.0V for pulses of less than 20 ns. Operating Modes Outputs Mode\Pin Read Word-wide Read Byte-wide Upper Read Byte-wide Lower Output Disable Standby Rapid Program(2) PGM Verify PGM Inhibit Product Identification (4) CE VIL VIL VIL X(1) VIH VIL X VIH VIL OE VIL VIL VIL VIH X (1) Ai X (1) BYTE/VPP VIH VIL VIL X X (5) O0-O7 DOUT DOUT DOUT O8-O14 DOUT High Z High Z High Z High Z DIN DOUT High Z O15/A-1 DOUT VIH VIL X(1) X (1) X(1) X (1) VIH VIL VIH VIL Ai Ai X(1) A9 = VH A0 = VIH or VIL A1 - A18 = VIL (3) VPP VPP VPP VIH Identification Code Notes: 1. X can be VIL or VIH. 2. Refer to the programming characteristics tables in this data sheet. 3. VH = 12.0 0.5V. 4. Two identifier words may be selected. All Ai inputs are held low (VIL) except A9,which is set to VH , and A0, which is toggled low (VIL) to select the Manufacturer's Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB) is specified with VPP = VCC . VCC > VPP will cause a slight increase in ISB . 3 DC and AC Operating Conditions for Read Operation AT27C800 -10 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 5V 10% -12 0C - 70C -40C - 85C 5V 10% -15 0C - 70C -40C - 85C 5V 10% DC and Operating Characteristics for Read Operation Symbol ILI ILO IPP1(2) Parameter Input Load Current Output Leakage Current VPP (1) Condition VIN = 0V to VCC VOUT = 0V to VCC VPP= VCC ISB1 (CMOS) CE = VCC 0.3V ISB2 (TTL) CE = 2.0 to VCC + 0.5V f = 5MHz, IOUT = 0 mA, CE = VIL Min Max 1.0 5.0 10 100 1.0 50 Units A A A A mA mA V V V V Read/Standby Current VCC(1) Standby Current ISB VCC Active Current VIL VIH VOL VOH Notes: Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL= 2.1 mA IOH = -400 mA -0.6 2.0 0.8 VCC + 0.5 0.4 2.4 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C800 -10 Symbol tACC (3) -12 Min Max 120 120 40 35 5.0 100 40 120 50 5.0 Min -15 Max 150 150 50 40 Units ns ns ns ns ns 150 60 ns ns Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, whichever occured first Output Hold from Address CE or OE, whichever occured first BYTE High to Output Valid BYTE Low to Output Transition Condition CE = OE = VIL OE = VIL CE = VIL Min Max 100 100 40 30 tCE(2) tOE (2,3) tDF(4,5) tOH(4) tST tSTD Notes: 5.0 2,3,4,5. See the AC Waveforms for Read Operation diagram. 4 AT27C800 AT27C800 Byte-Wide Read Mode AC Waveforms(1) Note: 1. BYTE/VPP = VIL Byte-Wide Read Mode AC Waveforms(1) Note: 1. BYTE/VPP = VIH BYTE Transition AC Waveforms A0 - A18 VALID VALID A-1 BYTE/VPP tACC tOH tST O 0 - O7 DATA OUT DATA OUT tOH O8 - O15 HI-Z DATA OUT tSTD Notes: 1. 2. 3. 4. 5. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. This parameter is only sampled and is not 100% tested. Output float is defined as the point when data is no longer driven. 5 Input Test Waveforms and Measurement Levels Output Test Load tR, tF < 20 ns (10% to 90%) Note: 1. CL = 100 pF including jig capacitance. Pin Capaticance (f = 1 MHz, T = 25V)(1) Typ CIN COUT Note: Max 10 12 Units pF pF Conditions VIN = 0V VOUT = 0V 4 8 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 6 AT27C800 AT27C800 Programming Waveforms(1) Notes: 1. 2. 3. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. When programming the AT27C800, a 0.1 F capacitor is required across VPP and ground to suppress voltage transients. DC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Supply Current A9 Product Identification Voltage CE = VIL 11.5 IOL = 2.1 mA IOH = -400 A 2.4 50 30 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max 10 0.8 VCC + 0.5 0.4 Units A V V V V mA mA V 7 AC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol tAS tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: 1. 2. 3. Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay(2) VPP Setup Time VCC Setup Time CE Program Pulse Width Data Valid from OE BYTE /VPP Pulse Rise Time During Programming (3) Test Conditions(1) Input Rise and Fall Times: (10% to 90%) 20 ns. Input Pulse Levels: 45V to 2.4V Input Pulse Levels: 0.8V to 2.0V Input Timing Reference Level: 0.8V to 2.0V Output Timing Reference Level: 0.8V to 2.0V Min 2 2 2 0 2 0 2 2 47.5 Max Units s s s s s 130 ns s s s ns ns 52.5 150 50 Vcc must be applied simultaneously or before VPP and removed simultaneously or after VPP. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven-- see timing diagram. Program Pulse width tolerance is 50 s 5%. Atmel's 27C800 Integrated Product Identification Code Pins A0 Codes Manufacturer Device Type 0 1 015 07 0 1 014 06 0 1 013 05 0 1 012 04 1 1 011 03 1 1 010 02 1 0 09 01 1 0 08 00 0 0 Hex Data 1E1E F8F8 8 AT27C800 AT27C800 Rapid Programming Algorithm A 50 s CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and BYTE/VPP is raised to 13.0V. Each address is first programmed with one 50 s CE pulse without verification. Then a verification/ reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50 s pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. 9 Ordering Information tACC (ns) 100 ICC (mA) Active 50 Standby 0.1 Ordering Code AT27C800-10DC AT27C800-10PC AT27C800-10RC AT27C800-10TC AT27C800-10DI AT27C800-10PI AT27C800-10RI AT27C800-10TI AT27C800-12DC AT27C800-12PC AT27C800-12RC AT27C800-12TC AT27C800-12DI AT27C800-12PI AT27C800-12RI AT27C800-12TI AT27C800-15DC AT27C800-15PC AT27C800-15RC AT27C800-15TC AT27C800-15DI AT27C800-15PI AT27C800-15RI AT27C800-15TI Package 42DW6 42P6 44R 48T 42DW6 42P6 44R 48T 42DW6 42P6 44R 48T 42DW6 42P6 44R 48T 42DW6 42P6 44R 48T 42DW6 42P6 44R 48T Operation Range Commercial (0C to 70C) 50 0.1 Industrial (-40C to 85C) 120 50 0.1 Commercial (0C to 70C) 50 0.1 Industrial (-40C to 85C) 150 50 0.1 Commercial (0C to 70C) 50 0.1 Industrial (-40C to 85C) Package Type 42DW6 42P6 44R 48T 42 Lead, 0.600" Wide, Ceramic Dual Inline Package (CDIP) 42 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 44 Lead, 0.525" Wide, Plastic Gull Wing Small Outline Package (SOIC/SOP) 48 Lead, Plastic Thin Small Outline Package (TSOP) 12 x 20 mm 10 AT27C800 |
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